The present invention generally relates to making a silicon-on-insulator (SOI) semiconductor wafer, and in particular to a method for gettering impurities into a surface layer of the SOI wafer and removing the surface layer.
Recently, silicon-on-insulator (SOI) wafers increasingly have been used in very-large scale integration (VLSI) or ultra-large scale integration (ULSI) of semiconductor devices. An SOI wafer typically has a layer of silicon on top of a layer of an insulator material. In an SOI integrated circuit, essentially complete device isolation may be achieved using conventional device processing methods by surrounding each device, including the bottom of the device, with an insulator. One advantage which SOI wafers have over bulk silicon wafers is that the area required for isolation between devices on an SOI wafer is less than the area typically required for isolation on a bulk silicon wafer.
SOI offers other advantages over bulk silicon technologies as well. For example, SOI offers a simpler fabrication sequence compared to a bulk silicon wafer. Devices fabricated on an SOI wafer may also have better radiation resistance, less photo-induced current, and less cross-talk than devices fabricated on bulk silicon wafers. Devices within integrated circuits in SOI wafers are very sensitive to the presence of even minute concentrations of some impurities. For example, metals, such as copper, nickel, silver, gold, or iron, within the active region of a device typically degrade several device characteristics, including leakage current and oxide breakdown voltage. These and other metals rapidly diffuse through silicon at temperatures typical of semiconductor device fabrication processes. These impurities may come to reside in the active region of the SOI wafer, as a result of various steps in the wafer fabrication process and their inability to diffuse through the insulation region. Accordingly, SOI wafers are more prone to device and reliability problems caused by the presence of impurities that remain in the active region.
Methods of gettering a silicon substrate are well known. Gettering is used to remove contaminants (usually heavy metals) from regions of the circuit where their presence would degrade device performance. Most all the transition metals, such as gold, copper, iron, titanium, nickel, etc., have been reported as possible contaminants. It is desirable to reduce the presence of such contaminants in the active regions in order to reduce, for example, reverse junction leakage, improve bipolar transistor gain, and increase refresh time in dynamic metal oxide semiconductor (MOS) memories. There are two common forms of gettering: intrinsic gettering and extrinsic gettering.
Intrinsic gettering involves forming gettering sites in the bulk of a semiconductor substrate, generally below the active regions near the frontside surface of the semiconductor substrate. In silicon substrates (wafers) manufactured using the Czochralski (Cz) method, intrinsic gettering generally includes an initial denuding step (for wafers without silicon epitaxial layers) followed by a nucleation step, and then a precipitation step. Denudation, nucleation, and precipitation, in combination, form lattice dislocations in the silicon bulk below the active regions. The dislocations serve to trap heavy metal ions at the dislocation sites, away from the overlying active regions.
Intrinsic gettering has been applied to standard semiconductor wafers for many years. However, due to the comparatively thin device or active layer of SOI wafers, intrinsic gettering cannot easily be applied to such wafers without unduly increasing the thickness of the device or active layer, which would defeat the purpose of the SOI wafer, i.e., to have a relatively thin monocrystalline silicon device or active layer. Thus, SOI wafers do not lend themselves to intrinsic gettering.
Extrinsic gettering, on the other hand, generally involves gettering near the backside surface of a silicon substrate. There are several methods used to perform extrinsic gettering. Two common methods include (i) diffusing phosphorous into the backside surface of a silicon wafer, and/or (ii) depositing polycrystalline silicon (polysilicon) on the backside surface of a silicon wafer. Diffusion processes utilizing extrinsic gettering techniques such as backside phosphorous diffusion and polysilicon deposition is described in Runyan, et al., Semiconductor Integrated Circuit Processing Technology, (Addison-Wesley Publishing Co., 1990), pp.428-442; and, DeBusk, et al., xe2x80x9cPractical Gettering in High Temperature Processingxe2x80x9d, Semiconductor International, (May 1992) (both of which are herein incorporated by reference for their teachings relating to gettering).
Extrinsic gettering has been applied to the frontside surface of polycrystalline silicon wafers, in which phosphorus doping of contact layers is used to obtain frontside (or topside) gettering of diffused impurities or contaminants.
In SOI wafer technology, however, the use of polysilicon in direct contact with the back of the SOI wafer is not an effective gettering scheme, since the buried oxide layer will act as a diffusion barrier, causing contaminants to become trapped in the SOI film. The use of topside gettering by phosphorus doping of contact layers has not been effective in SOI technology due to the fact that it has been applied late in the fabrication process and thus cannot prevent contamination during earlier stages of the process. Being applied late in the fabrication process, it can only provide gettering sites at accessible portions of the top surface of the circuit, leaving contaminants in other portions covered by device elements and from which the impurities cannot directly be gettered, which impurities may migrate from the other portions and thereby become troublesome.
The aforementioned problems resulting from both the nature of the SOI wafer and from the deficiencies in prior art gettering methods remain. The combination of these factors has presented a significant problem in gettering impurities from the active regions of SOI semiconductor devices at the beginning or early stages of the fabrication process. Thus, a gettering method applicable to SOI wafers in an early stage of the production of such wafers has been sought.
A method of extrinsic gettering of the surfaces of SOI wafers is the subject of this application. In one embodiment, the method is applied to the frontside, i.e., the surface of the silicon film which forms the device or active layer, of the SOI wafer. In one embodiment, the method is applied to both the frontside and the backside surfaces of the SOI wafer.
In one embodiment, the present invention relates to a method of manufacturing a silicon-on-insulator substrate, comprising the steps of:
providing a silicon-on-insulator semiconductor wafer having a device layer surface of a silicon film;
implanting an inert atom into the at least one surface to form a damaged surface layer including a gettering site on the silicon film and to leave an undamaged region of the silicon film;
subjecting the wafer to conditions to getter at least one impurity from the silicon film into the gettering site; and
removing the damaged surface layer.
In one embodiment, the silicon film is a monocrystalline silicon film.
In one embodiment, the inert atom is one or more of helium, argon, krypton, xenon, silicon or germanium.
In one embodiment, the damaged surface layer is removed by etching with an etchant or by chemical mechanical polishing. In one embodiment, the damaged surface layer is removed by an etchant comprising hydrogen fluoride. In one embodiment, a portion of the undamaged region of the silicon film is removed by chemical mechanical polishing.
In one embodiment, the step of removing the damaged surface layer includes removing a portion of the undamaged region of the silicon film. In one embodiment, the silicon film has an initial thickness in excess of a predetermined final thickness. In one embodiment, the removal of the damaged surface layer and the portion of the undamaged silicon film leaves the predetermined final thickness of the silicon film.
In one embodiment, the method results in reduction of a concentration of at least one impurity in the silicon film.
In one embodiment, the present invention relates to a method of manufacturing a silicon-on-insulator substrate, comprising the steps of:
providing a silicon-on-insulator semiconductor wafer having at least one surface of a silicon film, wherein the silicon film has an initial thickness in excess of a predetermined final thickness;
implanting an inert atom into the at least one surface to form a damaged surface layer including a gettering site on the silicon film and to leave an undamaged region of the silicon film;
subjecting the wafer to conditions to getter the at least one impurity from the silicon film into the gettering site; and
removing the damaged surface layer and an undamaged portion of the silicon film, leaving the predetermined final thickness of the silicon film.
In one embodiment, the present invention relates to a method of manufacturing a silicon-on-insulator substrate, comprising the steps of:
providing a silicon-on-insulator semiconductor wafer having at least one surface of a monocrystalline silicon film, wherein the monocrystalline silicon film has an initial thickness in excess of a predetermined final thickness, and the monocrystalline silicon film contains an initial concentration of at least one impurity;
implanting an inert atom into the at least one surface to form a damaged surface layer including a gettering site on the monocrystalline silicon film and to leave an undamaged region of the monocrystalline silicon film;
subjecting the wafer to conditions to getter the at least one impurity from the monocrystalline silicon film into the gettering site; and
removing the damaged surface layer and a portion of the undamaged region of the monocrystalline silicon film, leaving the predetermined final thickness of the monocrystalline silicon film, wherein the predetermined final thickness of the monocrystalline film contains a concentration of the at least one impurity substantially lower than the initial concentration.
Thus, the present invention provides a method for gettering an SOI wafer which addresses and overcomes the limitations of the prior art.